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x86
Commit message (
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Author
Age
Files
Lines
*
Merge remote-tracking branch 'Gramner/vpexpand'
H. Peter Anvin
2022-11-07
1
-18
/
+12
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\
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x86/insns.dat: Fix VPCOMPRESSB and VPCOMPRESSW disp8
Henrik Gramner
2022-01-25
1
-6
/
+6
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*
x86/insns.dat: Fix VPEXPANDB and VPEXPANDW encoding
Henrik Gramner
2022-01-25
1
-12
/
+6
*
|
Merge remote-tracking branch 'ElyesH/typos'
H. Peter Anvin
2022-11-07
2
-2
/
+2
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\
\
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*
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Fix some typos
Elyes HAOUAS
2022-01-09
2
-2
/
+2
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/
*
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restire: Support of AVX512-FP16 Instructions
Iouri Kharon
2022-11-07
3
-13
/
+261
*
|
x86/insns.dat: fix VCVTNEPS2BF16
H. Peter Anvin
2022-11-07
1
-4
/
+4
*
|
Add FRED instructions
H. Peter Anvin
2022-10-05
2
-2
/
+12
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/
*
x86/insns: add VMGEXIT
Cyrill Gorcunov
2021-05-13
1
-0
/
+2
*
x86/insns: add RMPADJUST
Cyrill Gorcunov
2021-05-13
1
-0
/
+1
*
x86/insns: add PVALIDATE
Cyrill Gorcunov
2021-05-13
1
-0
/
+2
*
Fix inefficient encoding of MPX instructions
H. Peter Anvin
2020-08-13
2
-4
/
+5
*
BR 3392705: AVX512: reinstate the SSE-like opcodes for VPCMPEQ/GT
H. Peter Anvin (Intel)
2020-07-30
1
-0
/
+27
*
insns.pl: audit for impossible Sx patterns; fix a few
H. Peter Anvin (Intel)
2020-07-30
2
-21
/
+66
*
BR 3392704: unbreak MOVHPD instruction
H. Peter Anvin (Intel)
2020-07-28
1
-4
/
+4
*
BR 2292703: Add memory sizes to SSE and some other instructions
H. Peter Anvin (Intel)
2020-07-27
1
-145
/
+129
*
BR 2292702: fix ENQCMDS and TILELOADT1 instructions
H. Peter Anvin (Intel)
2020-07-27
1
-5
/
+5
*
insns.dat: fix accidentally duplicated patterns
H. Peter Anvin
2020-07-17
1
-28
/
+0
*
insns.dat: get rid of the X64 marker (= X86_64,LONG)
H. Peter Anvin
2020-07-17
2
-393
/
+419
*
x86/insns.dat: add tuple type for the latest AVX512 instructions
H. Peter Anvin
2020-07-17
1
-12
/
+12
*
Add support for new instructions from ISE June 2020
H. Peter Anvin
2020-07-16
4
-9
/
+69
*
insns.dat: Add Intel Control-Flow Enforcement Technology (CET) instructions
Henrik Gramner
2020-06-27
2
-0
/
+17
*
BR 3392681: handle a64 instruction patters correctly
H. Peter Anvin (Intel)
2020-06-22
1
-3
/
+3
*
avx512: remove bogus imm8 for specific VCMP and VPCMP operations
H. Peter Anvin (Intel)
2020-06-05
1
-584
/
+584
*
avx512: implement shorthand forms of VCMP and VPCMP opcodes
H. Peter Anvin (Intel)
2020-06-05
1
-25
/
+585
*
BR 3392676: fix cmpxchg8b/16b with explicit size
H. Peter Anvin (Intel)
2020-06-04
1
-2
/
+2
*
BR 3392674: fix handling of {ud1,ud2b} <reg>,<reg>
H. Peter Anvin
2020-06-01
1
-6
/
+6
*
insns.dat: Fix the opcodes for the AVX512-VBMI2 instructions
Henrik Gramner
2020-04-22
1
-18
/
+18
*
LEA: allow immediate syntax; ignore operand size entirely
H. Peter Anvin (Intel)
2019-08-14
2
-3
/
+7
*
obsolete handing: handle a few more subcases in a useful way
H. Peter Anvin (Intel)
2019-08-09
3
-9
/
+18
*
perl files: clean up warnings
H. Peter Anvin (Intel)
2019-08-09
2
-13
/
+15
*
Add implicitly sized versions of the K instructions
H. Peter Anvin (Intel)
2019-08-09
1
-2
/
+72
*
insns.pl: use less cantankerous string expansion; better error info
H. Peter Anvin (Intel)
2019-08-09
2
-43
/
+52
*
x86/insns-iflags.ph: add comments in iflag.c
H. Peter Anvin
2019-08-07
1
-3
/
+6
*
iflags.ph: add file missing from commit 418138c8f2d1
H. Peter Anvin (Intel)
2019-08-07
1
-0
/
+121
*
iflags: move definitions to a separate file; auto-generate more
H. Peter Anvin (Intel)
2019-08-06
1
-141
/
+89
*
insns.dat: Fix MOVDDUP instruction
Chang S. Bae
2019-06-02
1
-1
/
+1
*
Merge tag 'nasm-2.14.01'
H. Peter Anvin
2018-12-22
1
-0
/
+3
|
\
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*
insns.dat: accept explicit ax/eax/rax operand to CLZERO
H. Peter Anvin
2018-12-22
1
-0
/
+3
*
|
Don't convert the various RESx instructions to RESB
H. Peter Anvin
2018-12-18
1
-7
/
+7
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/
*
insns.dat: add Intel Software Guard Extensions (SGX) instructions
H. Peter Anvin (Intel)
2018-06-25
2
-0
/
+6
*
insns.dat: V4F(N)MADDSS are .lig not .512
H. Peter Anvin (Intel)
2018-06-25
1
-2
/
+2
*
insns.dat: fix the opcodes for the V4FNM* instructions
H. Peter Anvin
2018-06-25
1
-2
/
+2
*
asm: support the +n syntax for register sets
H. Peter Anvin
2018-06-25
1
-6
/
+6
*
insns.dat: add support for the V4* and VP4* 4-way instructions
nasm-2.14rc8
H. Peter Anvin (Intel)
2018-06-25
2
-0
/
+12
*
insns.dat: add PTWRITE instruction
H. Peter Anvin (Intel)
2018-06-25
1
-0
/
+4
*
insns.dat: update with instructions from ISE 319433-034
H. Peter Anvin
2018-06-16
2
-3
/
+138
*
insns.dat: Update UD0 encoding to fit the specification
Cyrill Gorcunov
2018-02-25
1
-1
/
+4
*
Merge remote-tracking branch 'origin/nasm-2.13.xx'
H. Peter Anvin
2018-02-20
1
-1
/
+19
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\
|
*
insns.dat: add aliases of the RET instruction with explicit operand size
H. Peter Anvin
2018-02-14
1
-1
/
+19
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